This section is intended to introduce the reader to various aspects of art, which may be related to various aspects of the present invention that are described and/or claimed below. This discussion is believed to be helpful in providing the reader with background information to facilitate a better understanding of the various aspects of the present invention. Accordingly, it should be understood that these statements are to be read in this light, and not as admissions of prior art.
In the field of computer systems, it may be desirable for information to be transferred from a system memory associated with one computer system to a system memory associated with another computer system. Queue pairs (“QPs”) may be used to facilitate such a transfer of data. Each QP may include a send queue (“SQ”) and a receive queue (“RQ”) that may be utilized in transferring data from the memory of one device to the memory of another device. The RQ or the SQ may be associated with a completion queue (“CQ”) or different CQs. To notify the process that an event has completed, a CQ handler may be utilized to interact between the CQ or CQs and an application or consumer. For example, a CQ handler may notify the consumer that an operation has been completed with the information in the CQ relating to that event.
However, in a computing environment, the number interconnects and speed of the transactions continue to increase. Within a network interface, a single CQ handler may be used for that interface. The single CQ handler may be a bottleneck when for a large set of QPs. This may result in skewed performance, which is exhibited as erratic or inefficient system behavior. With multiple network interfaces or a large set of QPs on an interface, these inefficiencies may degrade the overall system performance.